The present invention relates to a functionally dividable multiplier array circuit for performing multiplications on the basis of the Booth's algorithm. The "functionally dividable" multiplier denotes the multiplier which can select the simultaneous execution of two sets of the multiplication of (half word).times.(half word) and the multiplication of (one word).times.(one word).
There is demand for such a multiplier circuit which can perform the multiplication of (2m bits) (i.e., one word).times.(2m bits) and can also simultaneously execute the multiplication of (m bits).times.(m bits) by two routes, as necessary.